Classic Timing Analyzer report for JMPER
Wed Nov 06 15:13:31 2013
Quartus II Version 9.1 Build 222 10/21/2009 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Parallel Compilation
  6. Clock Setup: 'JMP_IN'
  7. Clock Setup: 'CLOCK'
  8. Clock Hold: 'JMP_IN'
  9. Clock Hold: 'CLOCK'
 10. tsu
 11. tco
 12. tpd
 13. th
 14. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                                                                                                                                                                                                             ;
+------------------------------+------------------------------------------+---------------+----------------------------------+--------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------+----------+--------------+
; Type                         ; Slack                                    ; Required Time ; Actual Time                      ; From                                                                                                         ; To                                                                                                                               ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+------------------------------------------+---------------+----------------------------------+--------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------+----------+--------------+
; Worst-case tsu               ; N/A                                      ; None          ; 4.883 ns                         ; JMP_IN                                                                                                       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; --         ; CLOCK    ; 0            ;
; Worst-case tco               ; N/A                                      ; None          ; 21.814 ns                        ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                              ; JMP_OUT                                                                                                                          ; CLOCK      ; --       ; 0            ;
; Worst-case tpd               ; N/A                                      ; None          ; 13.232 ns                        ; JMP_IN                                                                                                       ; IP[4]                                                                                                                            ; --         ; --       ; 0            ;
; Worst-case th                ; N/A                                      ; None          ; 9.302 ns                         ; JMP_IN                                                                                                       ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; --         ; CLOCK    ; 0            ;
; Clock Setup: 'CLOCK'         ; N/A                                      ; None          ; 91.14 MHz ( period = 10.972 ns ) ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; 0            ;
; Clock Setup: 'JMP_IN'        ; N/A                                      ; None          ; 223.51 MHz ( period = 4.474 ns ) ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; JMP_IN     ; JMP_IN   ; 0            ;
; Clock Hold: 'CLOCK'          ; Not operational: Clock Skew > Data Delay ; None          ; N/A                              ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; 492          ;
; Clock Hold: 'JMP_IN'         ; Not operational: Clock Skew > Data Delay ; None          ; N/A                              ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; JMP_IN     ; JMP_IN   ; 61           ;
; Total number of failed paths ;                                          ;               ;                                  ;                                                                                                              ;                                                                                                                                  ;            ;          ; 553          ;
+------------------------------+------------------------------------------+---------------+----------------------------------+--------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------+----------+--------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                                                                            ;
+------------------------------------------------------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                                                               ; Setting            ; From ; To ; Entity Name ;
+------------------------------------------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                                                                          ; EP2C5F256C6        ;      ;    ;             ;
; Timing Models                                                                                        ; Final              ;      ;    ;             ;
; Default hold multicycle                                                                              ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains                                                            ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                                                               ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                                                                       ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                                                                     ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                                                                ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements                                                              ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                                                                     ; Off                ;      ;    ;             ;
; Enable Clock Latency                                                                                 ; Off                ;      ;    ;             ;
; Use TimeQuest Timing Analyzer                                                                        ; Off                ;      ;    ;             ;
; Number of source nodes to report per destination node                                                ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                                                                ; 10                 ;      ;    ;             ;
; Number of paths to report                                                                            ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                                                                         ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                                                               ; Off                ;      ;    ;             ;
; Report IO Paths Separately                                                                           ; Off                ;      ;    ;             ;
; Perform Multicorner Analysis                                                                         ; On                 ;      ;    ;             ;
; Reports the worst-case path for each clock domain and analysis                                       ; Off                ;      ;    ;             ;
; Reports worst-case timing paths for each clock domain and analysis                                   ; On                 ;      ;    ;             ;
; Specifies the maximum number of worst-case timing paths to report for each clock domain and analysis ; 100                ;      ;    ;             ;
; Removes common clock path pessimism (CCPP) during slack computation                                  ; Off                ;      ;    ;             ;
; Output I/O Timing Endpoint                                                                           ; Near End           ;      ;    ;             ;
+------------------------------------------------------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; JMP_IN          ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
; CLOCK           ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
+-------------------------------------+
; Parallel Compilation                ;
+----------------------------+--------+
; Processors                 ; Number ;
+----------------------------+--------+
; Number detected on machine ; 2      ;
; Maximum allowed            ; 1      ;
+----------------------------+--------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'JMP_IN'                                                                                                                                                                                                                                                                                                                                                                                                                         ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                            ; To                                                                                                              ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 223.51 MHz ( period = 4.474 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.719 ns                ;
; N/A                                     ; 225.33 MHz ( period = 4.438 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.683 ns                ;
; N/A                                     ; 227.12 MHz ( period = 4.403 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.648 ns                ;
; N/A                                     ; 228.99 MHz ( period = 4.367 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.612 ns                ;
; N/A                                     ; 230.84 MHz ( period = 4.332 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.577 ns                ;
; N/A                                     ; 232.72 MHz ( period = 4.297 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.542 ns                ;
; N/A                                     ; 234.69 MHz ( period = 4.261 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.506 ns                ;
; N/A                                     ; 235.63 MHz ( period = 4.244 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.489 ns                ;
; N/A                                     ; 236.63 MHz ( period = 4.226 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; 236.63 MHz ( period = 4.226 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; 237.64 MHz ( period = 4.208 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.453 ns                ;
; N/A                                     ; 239.64 MHz ( period = 4.173 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.418 ns                ;
; N/A                                     ; 240.67 MHz ( period = 4.155 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.400 ns                ;
; N/A                                     ; 241.72 MHz ( period = 4.137 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; 242.54 MHz ( period = 4.123 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.368 ns                ;
; N/A                                     ; 243.78 MHz ( period = 4.102 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; 243.78 MHz ( period = 4.102 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; 245.88 MHz ( period = 4.067 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.312 ns                ;
; N/A                                     ; 245.94 MHz ( period = 4.066 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; 246.79 MHz ( period = 4.052 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.297 ns                ;
; N/A                                     ; 248.08 MHz ( period = 4.031 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; 248.08 MHz ( period = 4.031 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; 250.25 MHz ( period = 3.996 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.241 ns                ;
; N/A                                     ; 250.25 MHz ( period = 3.996 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.241 ns                ;
; N/A                                     ; 250.31 MHz ( period = 3.995 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.240 ns                ;
; N/A                                     ; 251.00 MHz ( period = 3.984 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.229 ns                ;
; N/A                                     ; 252.53 MHz ( period = 3.960 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.205 ns                ;
; N/A                                     ; 252.53 MHz ( period = 3.960 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.205 ns                ;
; N/A                                     ; 277.01 MHz ( period = 3.610 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.855 ns                ;
; N/A                                     ; 277.01 MHz ( period = 3.610 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.855 ns                ;
; N/A                                     ; 277.09 MHz ( period = 3.609 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.854 ns                ;
; N/A                                     ; 277.93 MHz ( period = 3.598 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.843 ns                ;
; N/A                                     ; 279.56 MHz ( period = 3.577 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 279.56 MHz ( period = 3.577 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 279.56 MHz ( period = 3.577 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 297.09 MHz ( period = 3.366 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.719 ns                ;
; N/A                                     ; 300.30 MHz ( period = 3.330 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.683 ns                ;
; N/A                                     ; 303.49 MHz ( period = 3.295 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.648 ns                ;
; N/A                                     ; 303.77 MHz ( period = 3.292 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.537 ns                ;
; N/A                                     ; 306.84 MHz ( period = 3.259 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.612 ns                ;
; N/A                                     ; 310.17 MHz ( period = 3.224 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.577 ns                ;
; N/A                                     ; 313.58 MHz ( period = 3.189 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.542 ns                ;
; N/A                                     ; 317.16 MHz ( period = 3.153 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.506 ns                ;
; N/A                                     ; 318.88 MHz ( period = 3.136 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.489 ns                ;
; N/A                                     ; 320.72 MHz ( period = 3.118 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; 320.72 MHz ( period = 3.118 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; 322.58 MHz ( period = 3.100 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.453 ns                ;
; N/A                                     ; 326.26 MHz ( period = 3.065 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.418 ns                ;
; N/A                                     ; 328.19 MHz ( period = 3.047 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.400 ns                ;
; N/A                                     ; 330.14 MHz ( period = 3.029 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; 331.67 MHz ( period = 3.015 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.368 ns                ;
; N/A                                     ; 334.00 MHz ( period = 2.994 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; 334.00 MHz ( period = 2.994 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; 337.95 MHz ( period = 2.959 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.312 ns                ;
; N/A                                     ; 338.07 MHz ( period = 2.958 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; 339.67 MHz ( period = 2.944 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.297 ns                ;
; N/A                                     ; 342.11 MHz ( period = 2.923 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; 342.11 MHz ( period = 2.923 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; 346.26 MHz ( period = 2.888 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.241 ns                ;
; N/A                                     ; 346.26 MHz ( period = 2.888 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.241 ns                ;
; N/A                                     ; 346.38 MHz ( period = 2.887 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.240 ns                ;
; N/A                                     ; 347.71 MHz ( period = 2.876 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.229 ns                ;
; N/A                                     ; 350.63 MHz ( period = 2.852 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.205 ns                ;
; N/A                                     ; 350.63 MHz ( period = 2.852 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.205 ns                ;
; N/A                                     ; 399.68 MHz ( period = 2.502 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.855 ns                ;
; N/A                                     ; 399.68 MHz ( period = 2.502 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.855 ns                ;
; N/A                                     ; 399.84 MHz ( period = 2.501 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.854 ns                ;
; N/A                                     ; 401.61 MHz ( period = 2.490 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.276 ns                ;
; N/A                                     ; 401.61 MHz ( period = 2.490 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.843 ns                ;
; N/A                                     ; 405.02 MHz ( period = 2.469 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 405.02 MHz ( period = 2.469 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 405.02 MHz ( period = 2.469 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 411.69 MHz ( period = 2.429 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.215 ns                ;
; N/A                                     ; 413.39 MHz ( period = 2.419 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.205 ns                ;
; N/A                                     ; 423.91 MHz ( period = 2.359 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.145 ns                ;
; N/A                                     ; 424.09 MHz ( period = 2.358 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.144 ns                ;
; N/A                                     ; 425.89 MHz ( period = 2.348 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.134 ns                ;
; N/A                                     ; 430.48 MHz ( period = 2.323 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.109 ns                ;
; N/A                                     ; 437.06 MHz ( period = 2.288 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.074 ns                ;
; N/A                                     ; 437.25 MHz ( period = 2.287 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.073 ns                ;
; N/A                                     ; 439.17 MHz ( period = 2.277 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.063 ns                ;
; N/A                                     ; 444.05 MHz ( period = 2.252 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.038 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.003 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.003 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 2.002 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.992 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 0.537 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.968 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.967 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.932 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.932 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.931 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.921 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.897 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.897 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.896 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.861 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.861 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.860 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.850 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.826 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.826 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.825 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.794 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.790 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.790 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.789 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.779 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.755 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.755 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.754 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.723 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.719 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.719 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.718 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.684 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.684 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.683 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.666 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.652 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.648 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.648 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.620 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.620 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.613 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.613 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.612 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.595 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.581 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.577 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.560 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.559 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.549 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.549 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.549 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.542 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.542 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.524 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.524 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.510 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.506 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.489 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.489 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.488 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.484 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.478 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.478 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.478 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.453 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.453 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.453 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.453 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.439 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.418 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.418 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.418 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.417 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.413 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.407 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.407 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.407 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.400 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.368 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.346 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.343 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.342 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.336 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.336 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.336 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.312 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.312 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.297 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11] ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.275 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.272 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.271 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]  ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.265 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.265 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.265 ns                ;
; N/A                                     ; Restricted to 450.05 MHz ( period = 2.222 ns )      ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]    ; JMP_IN     ; JMP_IN   ; None                        ; None                      ; 1.241 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                                                 ;                                                                                                                 ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'CLOCK'                                                                                                                                                                                                                                                                                                                                                                                                                                                            ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                                             ; To                                                                                                                               ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 91.14 MHz ( period = 10.972 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.719 ns                ;
; N/A                                     ; 91.44 MHz ( period = 10.936 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.683 ns                ;
; N/A                                     ; 91.73 MHz ( period = 10.901 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.648 ns                ;
; N/A                                     ; 92.04 MHz ( period = 10.865 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.612 ns                ;
; N/A                                     ; 92.34 MHz ( period = 10.830 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.577 ns                ;
; N/A                                     ; 92.64 MHz ( period = 10.795 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.542 ns                ;
; N/A                                     ; 92.95 MHz ( period = 10.759 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.506 ns                ;
; N/A                                     ; 93.09 MHz ( period = 10.742 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.489 ns                ;
; N/A                                     ; 93.25 MHz ( period = 10.724 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; 93.25 MHz ( period = 10.724 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; 93.41 MHz ( period = 10.706 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.453 ns                ;
; N/A                                     ; 93.71 MHz ( period = 10.671 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.418 ns                ;
; N/A                                     ; 93.87 MHz ( period = 10.653 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.400 ns                ;
; N/A                                     ; 94.03 MHz ( period = 10.635 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; 94.15 MHz ( period = 10.621 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.368 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; 94.56 MHz ( period = 10.575 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.719 ns                ;
; N/A                                     ; 94.65 MHz ( period = 10.565 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.312 ns                ;
; N/A                                     ; 94.66 MHz ( period = 10.564 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; 94.79 MHz ( period = 10.550 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.297 ns                ;
; N/A                                     ; 94.89 MHz ( period = 10.539 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.683 ns                ;
; N/A                                     ; 94.98 MHz ( period = 10.529 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; 94.98 MHz ( period = 10.529 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; 95.20 MHz ( period = 10.504 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.648 ns                ;
; N/A                                     ; 95.29 MHz ( period = 10.494 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.241 ns                ;
; N/A                                     ; 95.29 MHz ( period = 10.494 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.241 ns                ;
; N/A                                     ; 95.30 MHz ( period = 10.493 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.240 ns                ;
; N/A                                     ; 95.40 MHz ( period = 10.482 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.229 ns                ;
; N/A                                     ; 95.53 MHz ( period = 10.468 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.612 ns                ;
; N/A                                     ; 95.62 MHz ( period = 10.458 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.205 ns                ;
; N/A                                     ; 95.62 MHz ( period = 10.458 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.205 ns                ;
; N/A                                     ; 95.85 MHz ( period = 10.433 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.577 ns                ;
; N/A                                     ; 96.17 MHz ( period = 10.398 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.542 ns                ;
; N/A                                     ; 96.51 MHz ( period = 10.362 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.506 ns                ;
; N/A                                     ; 96.67 MHz ( period = 10.345 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.489 ns                ;
; N/A                                     ; 96.83 MHz ( period = 10.327 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; 96.83 MHz ( period = 10.327 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.471 ns                ;
; N/A                                     ; 97.00 MHz ( period = 10.309 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.453 ns                ;
; N/A                                     ; 97.33 MHz ( period = 10.274 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.418 ns                ;
; N/A                                     ; 97.50 MHz ( period = 10.256 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.400 ns                ;
; N/A                                     ; 97.68 MHz ( period = 10.238 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.382 ns                ;
; N/A                                     ; 97.81 MHz ( period = 10.224 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.368 ns                ;
; N/A                                     ; 98.01 MHz ( period = 10.203 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; 98.01 MHz ( period = 10.203 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.347 ns                ;
; N/A                                     ; 98.35 MHz ( period = 10.168 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.312 ns                ;
; N/A                                     ; 98.36 MHz ( period = 10.167 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.311 ns                ;
; N/A                                     ; 98.49 MHz ( period = 10.153 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.297 ns                ;
; N/A                                     ; 98.70 MHz ( period = 10.132 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; 98.70 MHz ( period = 10.132 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.276 ns                ;
; N/A                                     ; 98.93 MHz ( period = 10.108 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.855 ns                ;
; N/A                                     ; 98.93 MHz ( period = 10.108 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.855 ns                ;
; N/A                                     ; 98.94 MHz ( period = 10.107 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.854 ns                ;
; N/A                                     ; 99.04 MHz ( period = 10.097 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.241 ns                ;
; N/A                                     ; 99.04 MHz ( period = 10.097 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.241 ns                ;
; N/A                                     ; 99.05 MHz ( period = 10.096 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.843 ns                ;
; N/A                                     ; 99.05 MHz ( period = 10.096 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.240 ns                ;
; N/A                                     ; 99.16 MHz ( period = 10.085 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.229 ns                ;
; N/A                                     ; 99.26 MHz ( period = 10.075 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 99.26 MHz ( period = 10.075 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 99.26 MHz ( period = 10.075 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 99.39 MHz ( period = 10.061 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.205 ns                ;
; N/A                                     ; 99.39 MHz ( period = 10.061 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.205 ns                ;
; N/A                                     ; 102.15 MHz ( period = 9.790 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.537 ns                ;
; N/A                                     ; 102.98 MHz ( period = 9.711 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.855 ns                ;
; N/A                                     ; 102.98 MHz ( period = 9.711 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.855 ns                ;
; N/A                                     ; 102.99 MHz ( period = 9.710 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.854 ns                ;
; N/A                                     ; 103.10 MHz ( period = 9.699 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.843 ns                ;
; N/A                                     ; 103.33 MHz ( period = 9.678 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 103.33 MHz ( period = 9.678 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 103.33 MHz ( period = 9.678 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.822 ns                ;
; N/A                                     ; 106.46 MHz ( period = 9.393 ns )                    ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; CLOCK      ; CLOCK    ; None                        ; None                      ; 0.537 ns                ;
; N/A                                     ; 129.07 MHz ( period = 7.748 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.352 ns                ;
; N/A                                     ; 134.37 MHz ( period = 7.442 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.046 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_we_reg         ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg0   ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg1   ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg2   ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg3   ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg4   ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg5   ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg6   ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 142.17 MHz ( period = 7.034 ns )                    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg7   ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.020 ns                ;
; N/A                                     ; 144.43 MHz ( period = 6.924 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.528 ns                ;
; N/A                                     ; 145.03 MHz ( period = 6.895 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.499 ns                ;
; N/A                                     ; 148.08 MHz ( period = 6.753 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.357 ns                ;
; N/A                                     ; 148.83 MHz ( period = 6.719 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.323 ns                ;
; N/A                                     ; 148.90 MHz ( period = 6.716 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.320 ns                ;
; N/A                                     ; 151.68 MHz ( period = 6.593 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.197 ns                ;
; N/A                                     ; 154.23 MHz ( period = 6.484 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.549 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 155.23 MHz ( period = 6.442 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 5.156 ns                ;
; N/A                                     ; 159.44 MHz ( period = 6.272 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.443 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 160.31 MHz ( period = 6.238 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.952 ns                ;
; N/A                                     ; 161.58 MHz ( period = 6.189 ns )                    ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                                              ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.520 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.833 ns                ;
; N/A                                     ; 166.06 MHz ( period = 6.022 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.318 ns                ;
; N/A                                     ; 167.17 MHz ( period = 5.982 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.298 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 167.73 MHz ( period = 5.962 ns )                    ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.676 ns                ;
; N/A                                     ; 169.89 MHz ( period = 5.886 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.250 ns                ;
; N/A                                     ; 172.06 MHz ( period = 5.812 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 7.099 ns                ;
; N/A                                     ; 173.31 MHz ( period = 5.770 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.192 ns                ;
; N/A                                     ; 175.41 MHz ( period = 5.701 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.999 ns                ;
; N/A                                     ; 176.24 MHz ( period = 5.674 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.144 ns                ;
; N/A                                     ; 180.86 MHz ( period = 5.529 ns )                    ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                                              ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.845 ns                ;
; N/A                                     ; 181.16 MHz ( period = 5.520 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.067 ns                ;
; N/A                                     ; 181.42 MHz ( period = 5.512 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.810 ns                ;
; N/A                                     ; 183.35 MHz ( period = 5.454 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.034 ns                ;
; N/A                                     ; 183.59 MHz ( period = 5.447 ns )                    ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                                              ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.778 ns                ;
; N/A                                     ; 183.96 MHz ( period = 5.436 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.025 ns                ;
; N/A                                     ; 184.20 MHz ( period = 5.429 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.716 ns                ;
; N/A                                     ; 184.37 MHz ( period = 5.424 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 4.019 ns                ;
; N/A                                     ; 188.04 MHz ( period = 5.318 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.616 ns                ;
; N/A                                     ; 188.29 MHz ( period = 5.311 ns )                    ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                                              ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.642 ns                ;
; N/A                                     ; 189.18 MHz ( period = 5.286 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.580 ns                ;
; N/A                                     ; 189.25 MHz ( period = 5.284 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.582 ns                ;
; N/A                                     ; 190.77 MHz ( period = 5.242 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.928 ns                ;
; N/A                                     ; 191.42 MHz ( period = 5.224 ns )                    ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.919 ns                ;
; N/A                                     ; 194.97 MHz ( period = 5.129 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.427 ns                ;
; N/A                                     ; 198.02 MHz ( period = 5.050 ns )                    ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                                              ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.379 ns                ;
; N/A                                     ; 198.14 MHz ( period = 5.047 ns )                    ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                              ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.376 ns                ;
; N/A                                     ; 198.85 MHz ( period = 5.029 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.316 ns                ;
; N/A                                     ; 200.12 MHz ( period = 4.997 ns )                    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                                             ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                                  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 6.295 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.803 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.794 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                                              ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.055 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_memory_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                                              ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg1   ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.948 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                                              ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg3   ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.890 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                                              ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.833 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                                              ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg6   ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.760 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                                              ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg5   ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.589 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                                              ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg2   ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.376 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                              ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg0   ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.309 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.297 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_memory_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a1~porta_memory_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a2~porta_memory_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a3~porta_memory_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.277 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.229 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                                              ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg4   ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.139 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                                              ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg7   ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.139 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.191 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.171 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.123 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.066 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 3.046 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.998 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.995 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.879 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.790 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.753 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.732 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.674 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.616 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.568 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.548 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.490 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.452 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.326 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.237 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.121 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_we_reg         ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.097 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.067 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.995 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_we_reg         ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.981 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.951 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_we_reg         ; CLOCK      ; CLOCK    ; None                        ; None                      ; 1.855 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                                                                  ;                                                                                                                                  ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'JMP_IN'                                                                                                                                                                                                                                                                                                                                                                ;
+------------------------------------------+--------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                            ; From                                                                                                         ; To                                                                                                           ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+------------------------------------------+--------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.537 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.843 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.854 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.205 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.205 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.229 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.240 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.241 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.241 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.276 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.276 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.297 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.311 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.312 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.347 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.347 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.368 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.382 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.400 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.418 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.453 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.489 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.506 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.542 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.577 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.612 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.537 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.648 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.683 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.719 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.843 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.854 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.205 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.205 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.229 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.240 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.241 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.241 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.276 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.276 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.297 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.311 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.312 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.347 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.347 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.368 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.382 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.400 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; JMP_IN     ; JMP_IN   ; None                       ; None                       ; 1.418 ns                 ;
+------------------------------------------+--------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'CLOCK'                                                                                                                                                                                                                                                                                                                                                                   ;
+------------------------------------------+--------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                            ; From                                                                                                         ; To                                                                                                             ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+------------------------------------------+--------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.537 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.843 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.854 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.537 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.205 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.205 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.822 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.229 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.240 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.843 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.241 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.241 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.854 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.276 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.276 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.297 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.311 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.312 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.347 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.347 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.368 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.382 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.400 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.418 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.453 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.489 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.506 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.542 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.577 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.205 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.205 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.612 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.229 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.240 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.241 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.241 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.648 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.276 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.276 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.683 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.297 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.311 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.312 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.719 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.347 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.347 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.368 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.382 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.400 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.418 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                           ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.581 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.453 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.489 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.506 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.542 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.577 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                           ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.730 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                           ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.742 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.612 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.648 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                           ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.819 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.683 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                           ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.856 ns                 ;
; Not operational: Clock Skew > Data Delay ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0] ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]   ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.719 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]    ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                           ; CLOCK      ; CLOCK    ; None                       ; None                       ; 1.972 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.351 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.497 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.512 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.550 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.572 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.617 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.651 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.671 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.666 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.673 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.677 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.687 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.687 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.699 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.707 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.720 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.736 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.735 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.747 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.763 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.764 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.767 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.778 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.806 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.823 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.830 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.860 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.875 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.872 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.874 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.874 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.880 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.900 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.890 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.939 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.956 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.972 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.981 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.991 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.003 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.013 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.020 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.046 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.047 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.058 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.083 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.075 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.084 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.100 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.108 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.120 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.119 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.124 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.125 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.158 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.160 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.180 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.189 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.214 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.218 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.223 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.264 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.290 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.306 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.330 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.342 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.352 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.342 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.352 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.394 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.400 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.415 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.442 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.475 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.507 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.511 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.506 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.568 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.596 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.604 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.611 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.627 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.682 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.727 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.740 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.728 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.781 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.812 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.824 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.836 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.854 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.877 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.864 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.874 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.921 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.928 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.928 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.976 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 3.985 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.014 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.015 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.037 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.033 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.068 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                         ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.063 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.102 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.113 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.141 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.144 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2] ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.254 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1] ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.261 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.257 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.282 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2] ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.379 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1] ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.386 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.351 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.377 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2] ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.485 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]    ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1] ; CLOCK      ; CLOCK    ; None                       ; None                       ; 2.492 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.417 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.413 ns                 ;
; Not operational: Clock Skew > Data Delay ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                          ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                ; CLOCK      ; CLOCK    ; None                       ; None                       ; 4.434 ns                 ;
; Timing analysis restricted to 200 rows.  ; To change the limit use Settings (Assignments menu)                                                          ;                                                                                                                ;            ;          ;                            ;                            ;                          ;
+------------------------------------------+--------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                                                                                                                                    ;
+-----------------------------------------+-----------------------------------------------------+------------+-------------+----------------------------------------------------------------------------------------------------------------------------------+----------+
; Slack                                   ; Required tsu                                        ; Actual tsu ; From        ; To                                                                                                                               ; To Clock ;
+-----------------------------------------+-----------------------------------------------------+------------+-------------+----------------------------------------------------------------------------------------------------------------------------------+----------+
; N/A                                     ; None                                                ; 4.883 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK    ;
; N/A                                     ; None                                                ; 4.660 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK    ;
; N/A                                     ; None                                                ; 4.333 ns   ; IP_DATA[1]  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK    ;
; N/A                                     ; None                                                ; 4.243 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK    ;
; N/A                                     ; None                                                ; 4.208 ns   ; IP_DATA[0]  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK    ;
; N/A                                     ; None                                                ; 4.188 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK    ;
; N/A                                     ; None                                                ; 4.165 ns   ; IP_DATA[2]  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK    ;
; N/A                                     ; None                                                ; 4.139 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK    ;
; N/A                                     ; None                                                ; 4.086 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK    ;
; N/A                                     ; None                                                ; 3.951 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK    ;
; N/A                                     ; None                                                ; 3.946 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK    ;
; N/A                                     ; None                                                ; 3.936 ns   ; IP_DATA[7]  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK    ;
; N/A                                     ; None                                                ; 3.278 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.243 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.207 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.172 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.170 ns   ; JMP_IN      ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK    ;
; N/A                                     ; None                                                ; 3.136 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.115 ns   ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.101 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.065 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.030 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.994 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.959 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.923 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.888 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.852 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.817 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.781 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.763 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.761 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.746 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.692 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.690 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.622 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.621 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.619 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.587 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.551 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.550 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.548 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.516 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.510 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.480 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.479 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.477 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.445 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.439 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.409 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.408 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.406 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.374 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.368 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.359 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.338 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.337 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.335 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.324 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.303 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.297 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.288 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.267 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.266 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.264 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.253 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.232 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.226 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.217 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.209 ns   ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK    ;
; N/A                                     ; None                                                ; 2.196 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.182 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.173 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.161 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.155 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.146 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.131 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.111 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.107 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.102 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.096 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.084 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.075 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.060 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.040 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.036 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.031 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.025 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.013 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.004 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.989 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.980 ns   ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.969 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.965 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.960 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.958 ns   ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK    ;
; N/A                                     ; None                                                ; 1.954 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.933 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.928 ns   ; IP_DATA[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.918 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.910 ns   ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK    ;
; N/A                                     ; None                                                ; 1.909 ns   ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.898 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.894 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.889 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.883 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.862 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.857 ns   ; IP_DATA[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.854 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.844 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.842 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.838 ns   ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.827 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.823 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.818 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.812 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.809 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.788 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.783 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.774 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.773 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.771 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.767 ns   ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.752 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.747 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.741 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.712 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.703 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.703 ns   ; IP_DATA[14] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.702 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.700 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.696 ns   ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.694 ns   ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK    ;
; N/A                                     ; None                                                ; 1.685 ns   ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK    ;
; N/A                                     ; None                                                ; 1.668 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.641 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.632 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.631 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.629 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.597 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.591 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.570 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.561 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.560 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.559 ns   ; IP_DATA[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.558 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.532 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.526 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.520 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.490 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.489 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.488 ns   ; IP_DATA[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.487 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.471 ns   ; IP_DATA[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.455 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.449 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.419 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.418 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.417 ns   ; IP_DATA[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.416 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.384 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.378 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.366 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.364 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.355 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.348 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.347 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.345 ns   ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.315 ns   ; IP_DATA[14] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.313 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.313 ns   ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.307 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.277 ns   ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.254 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.242 ns   ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.236 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.212 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.188 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.183 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.182 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.177 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.165 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.141 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.117 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.112 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.106 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.094 ns   ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.070 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.061 ns   ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.046 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.041 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.035 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.034 ns   ; IP_DATA[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.009 ns   ; IP_DATA[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.999 ns   ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.990 ns   ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.975 ns   ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.970 ns   ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.964 ns   ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.957 ns   ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK    ;
; N/A                                     ; None                                                ; 0.938 ns   ; IP_DATA[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;            ;             ;                                                                                                                                  ;          ;
+-----------------------------------------+-----------------------------------------------------+------------+-------------+----------------------------------------------------------------------------------------------------------------------------------+----------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                                                                                                                                                        ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------+---------------+------------+
; Slack                                   ; Required tco                                        ; Actual tco ; From                                                                                                                             ; To            ; From Clock ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------+---------------+------------+
; N/A                                     ; None                                                ; 21.814 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                                  ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 21.602 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                                  ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 21.522 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                                  ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 21.449 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                                  ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 20.900 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                                  ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 20.789 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                                  ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 20.222 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                                  ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 20.132 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                                  ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 19.359 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; A1_COUNT[5]   ; CLOCK      ;
; N/A                                     ; None                                                ; 18.143 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; A1_COUNT[0]   ; CLOCK      ;
; N/A                                     ; None                                                ; 18.139 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; A1_COUNT[3]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.991 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; A1_COUNT[6]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.950 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; A1_COUNT[1]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.916 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; A2_COUNT[3]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.883 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; A2_COUNT[0]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.862 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; A1_COUNT[4]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.852 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; A1_COUNT[7]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.847 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; A1_COUNT[2]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.817 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; A2_COUNT[4]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.810 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; A2_COUNT[1]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.761 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[2]                                                                                  ; A2_HIT[2]     ; CLOCK      ;
; N/A                                     ; None                                                ; 17.581 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; A2_COUNT[2]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.573 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; A2_COUNT[7]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.561 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; A2_COUNT[6]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.521 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; A2_COUNT[5]   ; CLOCK      ;
; N/A                                     ; None                                                ; 17.499 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]                                                                                  ; A2_HIT[0]     ; CLOCK      ;
; N/A                                     ; None                                                ; 17.480 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[3]                                                                                  ; A1_HIT[3]     ; CLOCK      ;
; N/A                                     ; None                                                ; 17.476 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[0]                                                                                  ; A1_HIT[0]     ; CLOCK      ;
; N/A                                     ; None                                                ; 17.454 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[1]                                                                                  ; A2_HIT[1]     ; CLOCK      ;
; N/A                                     ; None                                                ; 17.316 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[2]                                                                                  ; A1_HIT[2]     ; CLOCK      ;
; N/A                                     ; None                                                ; 17.311 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A1[1]                                                                                  ; A1_HIT[1]     ; CLOCK      ;
; N/A                                     ; None                                                ; 17.202 ns  ; SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[3]                                                                                  ; A2_HIT[3]     ; CLOCK      ;
; N/A                                     ; None                                                ; 16.668 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                                             ; A2_GHR[7]     ; CLOCK      ;
; N/A                                     ; None                                                ; 16.220 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; IP[4]         ; CLOCK      ;
; N/A                                     ; None                                                ; 16.206 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                                            ; A2_GHR[13]    ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_we_reg         ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg0   ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg1   ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg2   ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg3   ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg4   ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg5   ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg6   ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.192 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg7   ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.106 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                                             ; A2_GHR[2]     ; CLOCK      ;
; N/A                                     ; None                                                ; 16.094 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                                             ; A2_GHR[3]     ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                                             ; A1_GHR[7]     ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.093 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 16.037 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                                             ; A1_GHR[5]     ; CLOCK      ;
; N/A                                     ; None                                                ; 16.008 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                                             ; A1_GHR[1]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.984 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                                             ; A2_GHR[5]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.974 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                                             ; A1_GHR[3]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.960 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                                             ; A2_GHR[8]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.851 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                                            ; A2_GHR[12]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.837 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                                             ; A2_GHR[4]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.832 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                                             ; A1_GHR[9]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.829 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                                             ; A1_GHR[2]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.784 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                                             ; A1_GHR[4]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.781 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; A2_GHR[0]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.746 ns  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 15.733 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                                             ; A2_GHR[6]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.718 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                                            ; A2_GHR[10]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.704 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                                            ; A2_GHR[15]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.649 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                                            ; A1_GHR[14]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.559 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                                            ; A1_GHR[11]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.547 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                                            ; A2_GHR[14]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.544 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                                             ; A2_GHR[1]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.523 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                                            ; A1_GHR[12]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.510 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; A1_GHR[0]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.509 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                                             ; A1_GHR[8]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.455 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                                            ; A1_GHR[13]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.445 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                                            ; A1_GHR[10]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.444 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                                            ; A2_GHR[11]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.435 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                                             ; A1_GHR[6]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.433 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                                             ; A2_GHR[9]     ; CLOCK      ;
; N/A                                     ; None                                                ; 15.423 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst43|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; ALL_COUNT[3]  ; CLOCK      ;
; N/A                                     ; None                                                ; 15.244 ns  ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                                            ; A1_GHR[15]    ; CLOCK      ;
; N/A                                     ; None                                                ; 15.149 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst43|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; ALL_COUNT[0]  ; CLOCK      ;
; N/A                                     ; None                                                ; 15.127 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst43|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; ALL_COUNT[7]  ; CLOCK      ;
; N/A                                     ; None                                                ; 15.095 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst43|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; ALL_COUNT[4]  ; CLOCK      ;
; N/A                                     ; None                                                ; 15.051 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; IP[6]         ; CLOCK      ;
; N/A                                     ; None                                                ; 14.860 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst43|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; ALL_COUNT[5]  ; CLOCK      ;
; N/A                                     ; None                                                ; 14.860 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst43|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; ALL_COUNT[6]  ; CLOCK      ;
; N/A                                     ; None                                                ; 14.859 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst43|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; ALL_COUNT[2]  ; CLOCK      ;
; N/A                                     ; None                                                ; 14.857 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst43|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; ALL_COUNT[1]  ; CLOCK      ;
; N/A                                     ; None                                                ; 14.798 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; IP[1]         ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_we_reg         ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg0   ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg1   ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg2   ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg3   ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg4   ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg5   ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg6   ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.597 ns  ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg7   ; JMP1          ; CLOCK      ;
; N/A                                     ; None                                                ; 14.569 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; IP[0]         ; CLOCK      ;
; N/A                                     ; None                                                ; 14.288 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; IP[2]         ; CLOCK      ;
; N/A                                     ; None                                                ; 14.276 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; IP[3]         ; CLOCK      ;
; N/A                                     ; None                                                ; 14.268 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; IP[4]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 14.216 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; IP[7]         ; CLOCK      ;
; N/A                                     ; None                                                ; 14.213 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; IP[13]        ; CLOCK      ;
; N/A                                     ; None                                                ; 13.902 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; IP[15]        ; CLOCK      ;
; N/A                                     ; None                                                ; 13.776 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; IP[10]        ; CLOCK      ;
; N/A                                     ; None                                                ; 13.666 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; IP[5]         ; CLOCK      ;
; N/A                                     ; None                                                ; 13.649 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; IP[11]        ; CLOCK      ;
; N/A                                     ; None                                                ; 13.555 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; IP[8]         ; CLOCK      ;
; N/A                                     ; None                                                ; 13.532 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; IP[9]         ; CLOCK      ;
; N/A                                     ; None                                                ; 13.523 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; IP[14]        ; CLOCK      ;
; N/A                                     ; None                                                ; 13.518 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; IP[12]        ; CLOCK      ;
; N/A                                     ; None                                                ; 13.099 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; IP[6]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 12.846 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; IP[1]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 12.617 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; IP[0]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 12.336 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; IP[2]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 12.324 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; IP[3]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 12.264 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; IP[7]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 12.261 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; IP[13]        ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.950 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; IP[15]        ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.824 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; IP[10]        ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.788 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[4]                                              ; GHR[4]        ; CLOCK      ;
; N/A                                     ; None                                                ; 11.754 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[1]                                              ; GHR[1]        ; CLOCK      ;
; N/A                                     ; None                                                ; 11.714 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[4]         ; CLOCK      ;
; N/A                                     ; None                                                ; 11.714 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; IP[5]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.703 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[3]                                              ; GHR[3]        ; CLOCK      ;
; N/A                                     ; None                                                ; 11.697 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; IP[11]        ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.608 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; IP[4]         ; CLOCK      ;
; N/A                                     ; None                                                ; 11.603 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; IP[8]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.594 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[14]                                             ; GHR[14]       ; CLOCK      ;
; N/A                                     ; None                                                ; 11.581 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[7]                                              ; GHR[7]        ; CLOCK      ;
; N/A                                     ; None                                                ; 11.580 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; IP[9]         ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.571 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; IP[14]        ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.566 ns  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; IP[12]        ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.524 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[2]                                              ; GHR[2]        ; CLOCK      ;
; N/A                                     ; None                                                ; 11.483 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; IP[4]         ; CLOCK      ;
; N/A                                     ; None                                                ; 11.420 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                              ; GHR[0]        ; CLOCK      ;
; N/A                                     ; None                                                ; 11.340 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 11.283 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[5]                                              ; GHR[5]        ; CLOCK      ;
; N/A                                     ; None                                                ; 11.264 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[13]                                             ; GHR[13]       ; CLOCK      ;
; N/A                                     ; None                                                ; 11.224 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 11.170 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[12]                                             ; GHR[12]       ; CLOCK      ;
; N/A                                     ; None                                                ; 11.147 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[6]         ; CLOCK      ;
; N/A                                     ; None                                                ; 11.098 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; JMP_OUT       ; CLOCK      ;
; N/A                                     ; None                                                ; 11.089 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; A1_COUNT[5]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 11.084 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[6]                                              ; GHR[6]        ; CLOCK      ;
; N/A                                     ; None                                                ; 11.041 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; IP[6]         ; CLOCK      ;
; N/A                                     ; None                                                ; 11.007 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; A2_COUNT[3]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 10.993 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 10.974 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; A2_COUNT[0]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 10.938 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[11]                                             ; GHR[11]       ; CLOCK      ;
; N/A                                     ; None                                                ; 10.916 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; IP[6]         ; CLOCK      ;
; N/A                                     ; None                                                ; 10.915 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[8]                                              ; GHR[8]        ; CLOCK      ;
; N/A                                     ; None                                                ; 10.908 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; A2_COUNT[4]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 10.901 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; A2_COUNT[1]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 10.877 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 10.873 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[9]                                              ; GHR[9]        ; CLOCK      ;
; N/A                                     ; None                                                ; 10.860 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; REAL_COUNT[7] ; CLOCK      ;
; N/A                                     ; None                                                ; 10.845 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[4]                     ; REAL_COUNT[4] ; CLOCK      ;
; N/A                                     ; None                                                ; 10.835 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[1]                     ; REAL_COUNT[1] ; CLOCK      ;
; N/A                                     ; None                                                ; 10.826 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[10]                                             ; GHR[10]       ; CLOCK      ;
; N/A                                     ; None                                                ; 10.764 ns  ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[15]                                             ; GHR[15]       ; CLOCK      ;
; N/A                                     ; None                                                ; 10.751 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; JMP2          ; CLOCK      ;
; N/A                                     ; None                                                ; 10.694 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; REAL_COUNT[6] ; CLOCK      ;
; N/A                                     ; None                                                ; 10.691 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; REAL_COUNT[3] ; CLOCK      ;
; N/A                                     ; None                                                ; 10.672 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; A2_COUNT[2]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 10.664 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]                     ; A2_COUNT[7]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 10.652 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[6]                     ; A2_COUNT[6]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 10.612 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; A2_COUNT[5]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 10.554 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; REAL_COUNT[0] ; CLOCK      ;
; N/A                                     ; None                                                ; 10.552 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[5]                     ; REAL_COUNT[5] ; CLOCK      ;
; N/A                                     ; None                                                ; 10.542 ns  ; SELECTOR_BLOCK:inst4|lpm_counter2:inst45|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[2]                     ; REAL_COUNT[2] ; CLOCK      ;
; N/A                                     ; None                                                ; 10.215 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[7]         ; CLOCK      ;
; N/A                                     ; None                                                ; 10.109 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; IP[7]         ; CLOCK      ;
; N/A                                     ; None                                                ; 10.091 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[15]        ; CLOCK      ;
; N/A                                     ; None                                                ; 10.026 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[13]        ; CLOCK      ;
; N/A                                     ; None                                                ; 10.005 ns  ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[11]        ; CLOCK      ;
; N/A                                     ; None                                                ; 9.985 ns   ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; IP[15]        ; CLOCK      ;
; N/A                                     ; None                                                ; 9.984 ns   ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; IP[7]         ; CLOCK      ;
; N/A                                     ; None                                                ; 9.920 ns   ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; IP[13]        ; CLOCK      ;
; N/A                                     ; None                                                ; 9.899 ns   ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]                        ; IP[11]        ; CLOCK      ;
; N/A                                     ; None                                                ; 9.873 ns   ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]                     ; A1_COUNT[0]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 9.871 ns   ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[12]        ; CLOCK      ;
; N/A                                     ; None                                                ; 9.869 ns   ; SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[3]                     ; A1_COUNT[3]   ; JMP_IN     ;
; N/A                                     ; None                                                ; 9.860 ns   ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]                        ; IP[15]        ; CLOCK      ;
; N/A                                     ; None                                                ; 9.800 ns   ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[5]         ; CLOCK      ;
; N/A                                     ; None                                                ; 9.796 ns   ; CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]                        ; IP[1]         ; CLOCK      ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;            ;                                                                                                                                  ;               ;            ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------+---------------+------------+


+---------------------------------------------------------------------+
; tpd                                                                 ;
+-------+-------------------+-----------------+-------------+---------+
; Slack ; Required P2P Time ; Actual P2P Time ; From        ; To      ;
+-------+-------------------+-----------------+-------------+---------+
; N/A   ; None              ; 13.232 ns       ; JMP_IN      ; IP[4]   ;
; N/A   ; None              ; 12.207 ns       ; IP_DATA[1]  ; IP[1]   ;
; N/A   ; None              ; 12.107 ns       ; JMP_IN      ; IP[6]   ;
; N/A   ; None              ; 12.062 ns       ; JMP_IN      ; IP[1]   ;
; N/A   ; None              ; 12.059 ns       ; JMP_IN      ; IP[0]   ;
; N/A   ; None              ; 12.057 ns       ; JMP_IN      ; IP[15]  ;
; N/A   ; None              ; 12.024 ns       ; IP_DATA[0]  ; IP[0]   ;
; N/A   ; None              ; 11.992 ns       ; JMP_IN      ; IP[13]  ;
; N/A   ; None              ; 11.971 ns       ; JMP_IN      ; IP[11]  ;
; N/A   ; None              ; 11.755 ns       ; JMP_IN      ; IP[12]  ;
; N/A   ; None              ; 11.737 ns       ; IP_DATA[2]  ; IP[2]   ;
; N/A   ; None              ; 11.733 ns       ; JMP_IN      ; IP[14]  ;
; N/A   ; None              ; 11.721 ns       ; JMP_IN      ; IP[9]   ;
; N/A   ; None              ; 11.711 ns       ; JMP_IN      ; IP[2]   ;
; N/A   ; None              ; 11.449 ns       ; JMP_IN      ; IP[10]  ;
; N/A   ; None              ; 11.443 ns       ; JMP_IN      ; IP[7]   ;
; N/A   ; None              ; 11.433 ns       ; IP_DATA[7]  ; IP[7]   ;
; N/A   ; None              ; 11.364 ns       ; IP_DATA[11] ; IP[11]  ;
; N/A   ; None              ; 11.334 ns       ; JMP_IN      ; IP[3]   ;
; N/A   ; None              ; 11.159 ns       ; JMP_IN      ; IP[5]   ;
; N/A   ; None              ; 11.012 ns       ; IP_DATA[13] ; IP[13]  ;
; N/A   ; None              ; 10.914 ns       ; IP_DATA[15] ; IP[15]  ;
; N/A   ; None              ; 10.784 ns       ; IP_DATA[10] ; IP[10]  ;
; N/A   ; None              ; 10.761 ns       ; JMP_IN      ; IP[8]   ;
; N/A   ; None              ; 10.742 ns       ; IP_DATA[8]  ; IP[8]   ;
; N/A   ; None              ; 10.733 ns       ; JMP_IN      ; JMP1    ;
; N/A   ; None              ; 10.681 ns       ; CLOCK       ; IP[4]   ;
; N/A   ; None              ; 10.659 ns       ; IP_DATA[12] ; IP[12]  ;
; N/A   ; None              ; 10.635 ns       ; IP_DATA[9]  ; IP[9]   ;
; N/A   ; None              ; 10.618 ns       ; IP_DATA[14] ; IP[14]  ;
; N/A   ; None              ; 10.265 ns       ; CLOCK       ; JMP_OUT ;
; N/A   ; None              ; 10.114 ns       ; CLOCK       ; IP[6]   ;
; N/A   ; None              ; 10.009 ns       ; JMP_IN      ; JMP2    ;
; N/A   ; None              ; 9.918 ns        ; CLOCK       ; JMP2    ;
; N/A   ; None              ; 9.306 ns        ; IP_DATA[4]  ; IP[4]   ;
; N/A   ; None              ; 9.184 ns        ; JMP_IN      ; JMP_OUT ;
; N/A   ; None              ; 9.182 ns        ; CLOCK       ; IP[7]   ;
; N/A   ; None              ; 9.058 ns        ; CLOCK       ; IP[15]  ;
; N/A   ; None              ; 8.993 ns        ; CLOCK       ; IP[13]  ;
; N/A   ; None              ; 8.972 ns        ; CLOCK       ; IP[11]  ;
; N/A   ; None              ; 8.838 ns        ; CLOCK       ; IP[12]  ;
; N/A   ; None              ; 8.767 ns        ; CLOCK       ; IP[5]   ;
; N/A   ; None              ; 8.763 ns        ; CLOCK       ; IP[1]   ;
; N/A   ; None              ; 8.753 ns        ; CLOCK       ; IP[0]   ;
; N/A   ; None              ; 8.744 ns        ; CLOCK       ; IP[3]   ;
; N/A   ; None              ; 8.734 ns        ; CLOCK       ; IP[14]  ;
; N/A   ; None              ; 8.722 ns        ; CLOCK       ; IP[9]   ;
; N/A   ; None              ; 8.681 ns        ; CLOCK       ; IP[10]  ;
; N/A   ; None              ; 8.470 ns        ; CLOCK       ; IP[2]   ;
; N/A   ; None              ; 8.455 ns        ; CLOCK       ; IP[8]   ;
; N/A   ; None              ; 8.237 ns        ; IP_DATA[6]  ; IP[6]   ;
; N/A   ; None              ; 7.985 ns        ; CLOCK       ; JMP1    ;
; N/A   ; None              ; 7.208 ns        ; IP_DATA[3]  ; IP[3]   ;
; N/A   ; None              ; 7.204 ns        ; IP_DATA[5]  ; IP[5]   ;
+-------+-------------------+-----------------+-------------+---------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; th                                                                                                                                                                                                                                                                    ;
+-----------------------------------------+-----------------------------------------------------+-----------+-------------+----------------------------------------------------------------------------------------------------------------------------------+----------+
; Minimum Slack                           ; Required th                                         ; Actual th ; From        ; To                                                                                                                               ; To Clock ;
+-----------------------------------------+-----------------------------------------------------+-----------+-------------+----------------------------------------------------------------------------------------------------------------------------------+----------+
; N/A                                     ; None                                                ; 9.302 ns  ; JMP_IN      ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; CLOCK    ;
; N/A                                     ; None                                                ; 8.601 ns  ; JMP_IN      ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; CLOCK    ;
; N/A                                     ; None                                                ; 7.944 ns  ; CLOCK       ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst4|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; CLOCK    ;
; N/A                                     ; None                                                ; 7.902 ns  ; CLOCK       ; SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                             ; CLOCK    ;
; N/A                                     ; None                                                ; 5.045 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 5.005 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.940 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.662 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.622 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.591 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.557 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.520 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.486 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.463 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.449 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.392 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.327 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.321 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.290 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.267 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.260 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.256 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.250 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.219 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.185 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.179 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.148 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.114 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.108 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.100 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 4.077 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.043 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.037 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 4.006 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.972 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.966 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.935 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.901 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.879 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.864 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.830 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.808 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.793 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.737 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.712 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.679 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.666 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.641 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.595 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.570 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.436 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.411 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.365 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.340 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 3.294 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.269 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.223 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.198 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.152 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.127 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.093 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.081 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.056 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 3.053 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 3.010 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.988 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.985 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.939 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.914 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.710 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.670 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.639 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.605 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.568 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.534 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.511 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.497 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.440 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.408 ns  ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.375 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.369 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.338 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.315 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.310 ns  ; CLOCK       ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_we_reg         ; CLOCK    ;
; N/A                                     ; None                                                ; 2.308 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.304 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.298 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.267 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.233 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.227 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.219 ns  ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK    ;
; N/A                                     ; None                                                ; 2.196 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.172 ns  ; IP_DATA[6]  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK    ;
; N/A                                     ; None                                                ; 2.162 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.156 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.148 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.125 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.120 ns  ; IP_DATA[5]  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK    ;
; N/A                                     ; None                                                ; 2.091 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.085 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.054 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.020 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 2.014 ns  ; IP_DATA[6]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.983 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.949 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.927 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.912 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.878 ns  ; IP_DATA[5]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.856 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.841 ns  ; IP_DATA[3]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.785 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.777 ns  ; JMP_IN      ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.760 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.729 ns  ; IP_DATA[3]  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK    ;
; N/A                                     ; None                                                ; 1.727 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.714 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.689 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.643 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.625 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg       ; CLOCK    ;
; N/A                                     ; None                                                ; 1.618 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.616 ns  ; CLOCK       ; A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_datain_reg0    ; CLOCK    ;
; N/A                                     ; None                                                ; 1.484 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.484 ns  ; IP_DATA[4]  ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK    ;
; N/A                                     ; None                                                ; 1.459 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.454 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.413 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.388 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.342 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.317 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.271 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.246 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.200 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.175 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.148 ns  ; IP_DATA[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.135 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.129 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.123 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK    ;
; N/A                                     ; None                                                ; 1.104 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.058 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.033 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 1.026 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 1.000 ns  ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.987 ns  ; CLOCK       ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 0.985 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.962 ns  ; IP_DATA[4]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; JMP_IN   ;
; N/A                                     ; None                                                ; 0.961 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.959 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.919 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.895 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.870 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.869 ns  ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.867 ns  ; IP_DATA[14] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.827 ns  ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.818 ns  ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[8]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.816 ns  ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[1]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.765 ns  ; IP_DATA[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.752 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.711 ns  ; IP_DATA[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.696 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.694 ns  ; IP_DATA[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.688 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK    ;
; N/A                                     ; None                                                ; 0.650 ns  ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.642 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK    ;
; N/A                                     ; None                                                ; 0.623 ns  ; IP_DATA[12] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.612 ns  ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.597 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.569 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7 ; CLOCK    ;
; N/A                                     ; None                                                ; 0.568 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.567 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.564 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6 ; CLOCK    ;
; N/A                                     ; None                                                ; 0.563 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.560 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.558 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5 ; CLOCK    ;
; N/A                                     ; None                                                ; 0.552 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.541 ns  ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.511 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]                                              ; CLOCK    ;
; N/A                                     ; None                                                ; 0.486 ns  ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.479 ns  ; IP_DATA[14] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.470 ns  ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[5]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.441 ns  ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.435 ns  ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[9]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.430 ns  ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[2]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.415 ns  ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.412 ns  ; CLOCK       ; A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK    ;
; N/A                                     ; None                                                ; 0.408 ns  ; IP_DATA[0]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.399 ns  ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[6]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.394 ns  ; IP_DATA[7]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.373 ns  ; JMP_IN      ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[0]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.370 ns  ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.364 ns  ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[10]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.359 ns  ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[3]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.344 ns  ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[13]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.328 ns  ; IP_DATA[2]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[7]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.325 ns  ; IP_DATA[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.299 ns  ; IP_DATA[9]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.293 ns  ; IP_DATA[8]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[11]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.288 ns  ; IP_DATA[1]  ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[4]                   ; CLOCK    ;
; N/A                                     ; None                                                ; 0.273 ns  ; IP_DATA[10] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[14]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.264 ns  ; IP_DATA[11] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[12]                  ; CLOCK    ;
; N/A                                     ; None                                                ; 0.254 ns  ; IP_DATA[13] ; CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|pre_hazard[15]                  ; CLOCK    ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;           ;             ;                                                                                                                                  ;          ;
+-----------------------------------------+-----------------------------------------------------+-----------+-------------+----------------------------------------------------------------------------------------------------------------------------------+----------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
    Info: Version 9.1 Build 222 10/21/2009 SJ Web Edition
    Info: Processing started: Wed Nov 06 15:13:30 2013
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off JMPER -c JMPER --timing_analysis_only
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[15]~16"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[14]~17"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[13]~18"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[12]~19"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[11]~20"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[10]~21"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[9]~22"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[8]~23"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[7]~24"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[6]~25"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[5]~26"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[4]~27"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[3]~28"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[2]~29"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[1]~30"
Warning: Found combinational loop of 1 nodes
    Warning: Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[0]~31"
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "JMP_IN" is an undefined clock
    Info: Assuming node "CLOCK" is an undefined clock
Warning: Found 43 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
    Info: Detected gated clock "SELECTOR_BLOCK:inst4|inst51" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|inst18[0]~5" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|inst18[1]~4" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg7" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg6" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg5" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg3" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg2" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg1" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg0" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|inst8" as buffer
    Info: Detected ripple clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_we_reg" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|q_a[3]" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|q_a[2]" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|q_a[1]" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|q_a[0]" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|inst2~2" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|inst18[3]~6" as buffer
    Info: Detected gated clock "A2_BLOCK:inst1|inst44~1" as buffer
    Info: Detected gated clock "SELECTOR_BLOCK:inst4|inst48" as buffer
    Info: Detected gated clock "SELECTOR_BLOCK:inst4|inst37" as buffer
    Info: Detected gated clock "A1_BLOCK:inst|inst14~0" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg7" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg6" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg5" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg4" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg3" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg2" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg1" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg0" as buffer
    Info: Detected gated clock "A1_BLOCK:inst|inst8" as buffer
    Info: Detected ripple clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_we_reg" as buffer
    Info: Detected gated clock "A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|q_a[0]" as buffer
    Info: Detected gated clock "A1_BLOCK:inst|inst10" as buffer
    Info: Detected gated clock "SELECTOR_BLOCK:inst4|inst8" as buffer
    Info: Detected gated clock "A1_BLOCK:inst|inst44~1" as buffer
    Info: Detected gated clock "SELECTOR_BLOCK:inst4|inst46" as buffer
    Info: Detected ripple clock "CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]" as buffer
    Info: Detected ripple clock "CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[2]" as buffer
    Info: Detected ripple clock "CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]" as buffer
    Info: Detected gated clock "CONTROL_BLOCK:inst2|inst11" as buffer
    Info: Detected gated clock "CONTROL_BLOCK:inst2|inst13" as buffer
Info: Clock "JMP_IN" has Internal fmax of 223.51 MHz between source register "SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]" and destination register "SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]" (period= 4.474 ns)
    Info: + Longest register to register delay is 1.719 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X27_Y3_N5; Fanout = 3; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]'
        Info: 2: + IC(0.318 ns) + CELL(0.393 ns) = 0.711 ns; Loc. = LCCOMB_X27_Y3_N4; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita0~COUT'
        Info: 3: + IC(0.000 ns) + CELL(0.071 ns) = 0.782 ns; Loc. = LCCOMB_X27_Y3_N6; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita1~COUT'
        Info: 4: + IC(0.000 ns) + CELL(0.071 ns) = 0.853 ns; Loc. = LCCOMB_X27_Y3_N8; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita2~COUT'
        Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 0.924 ns; Loc. = LCCOMB_X27_Y3_N10; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita3~COUT'
        Info: 6: + IC(0.000 ns) + CELL(0.071 ns) = 0.995 ns; Loc. = LCCOMB_X27_Y3_N12; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita4~COUT'
        Info: 7: + IC(0.000 ns) + CELL(0.159 ns) = 1.154 ns; Loc. = LCCOMB_X27_Y3_N14; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita5~COUT'
        Info: 8: + IC(0.000 ns) + CELL(0.071 ns) = 1.225 ns; Loc. = LCCOMB_X27_Y3_N16; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita6~COUT'
        Info: 9: + IC(0.000 ns) + CELL(0.410 ns) = 1.635 ns; Loc. = LCCOMB_X27_Y3_N18; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita7'
        Info: 10: + IC(0.000 ns) + CELL(0.084 ns) = 1.719 ns; Loc. = LCFF_X27_Y3_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
        Info: Total cell delay = 1.401 ns ( 81.50 % )
        Info: Total interconnect delay = 0.318 ns ( 18.50 % )
    Info: - Smallest clock skew is -2.541 ns
        Info: + Shortest clock path from clock "JMP_IN" to destination register is 4.724 ns
            Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_K16; Fanout = 53; CLK Node = 'JMP_IN'
            Info: 2: + IC(1.214 ns) + CELL(0.150 ns) = 2.196 ns; Loc. = LCCOMB_X20_Y6_N8; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst48'
            Info: 3: + IC(1.270 ns) + CELL(0.000 ns) = 3.466 ns; Loc. = CLKCTRL_G1; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst48~clkctrl'
            Info: 4: + IC(0.721 ns) + CELL(0.537 ns) = 4.724 ns; Loc. = LCFF_X27_Y3_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
            Info: Total cell delay = 1.519 ns ( 32.15 % )
            Info: Total interconnect delay = 3.205 ns ( 67.85 % )
        Info: - Longest clock path from clock "JMP_IN" to source register is 7.265 ns
            Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_K16; Fanout = 53; CLK Node = 'JMP_IN'
            Info: 2: + IC(1.354 ns) + CELL(0.437 ns) = 2.623 ns; Loc. = LCCOMB_X15_Y6_N30; Fanout = 2; COMB Node = 'A2_BLOCK:inst1|inst18[0]~5'
            Info: 3: + IC(0.685 ns) + CELL(0.245 ns) = 3.553 ns; Loc. = LCCOMB_X19_Y6_N16; Fanout = 2; COMB Node = 'A2_BLOCK:inst1|inst2~2'
            Info: 4: + IC(0.260 ns) + CELL(0.245 ns) = 4.058 ns; Loc. = LCCOMB_X19_Y6_N30; Fanout = 3; COMB Node = 'A2_BLOCK:inst1|inst44~1'
            Info: 5: + IC(0.404 ns) + CELL(0.275 ns) = 4.737 ns; Loc. = LCCOMB_X20_Y6_N8; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst48'
            Info: 6: + IC(1.270 ns) + CELL(0.000 ns) = 6.007 ns; Loc. = CLKCTRL_G1; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst48~clkctrl'
            Info: 7: + IC(0.721 ns) + CELL(0.537 ns) = 7.265 ns; Loc. = LCFF_X27_Y3_N5; Fanout = 3; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]'
            Info: Total cell delay = 2.571 ns ( 35.39 % )
            Info: Total interconnect delay = 4.694 ns ( 64.61 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Micro setup delay of destination is -0.036 ns
Info: Clock "CLOCK" has Internal fmax of 91.14 MHz between source register "SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]" and destination register "SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]" (period= 10.972 ns)
    Info: + Longest register to register delay is 1.719 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X27_Y12_N5; Fanout = 3; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]'
        Info: 2: + IC(0.318 ns) + CELL(0.393 ns) = 0.711 ns; Loc. = LCCOMB_X27_Y12_N4; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita0~COUT'
        Info: 3: + IC(0.000 ns) + CELL(0.071 ns) = 0.782 ns; Loc. = LCCOMB_X27_Y12_N6; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita1~COUT'
        Info: 4: + IC(0.000 ns) + CELL(0.071 ns) = 0.853 ns; Loc. = LCCOMB_X27_Y12_N8; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita2~COUT'
        Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 0.924 ns; Loc. = LCCOMB_X27_Y12_N10; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita3~COUT'
        Info: 6: + IC(0.000 ns) + CELL(0.071 ns) = 0.995 ns; Loc. = LCCOMB_X27_Y12_N12; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita4~COUT'
        Info: 7: + IC(0.000 ns) + CELL(0.159 ns) = 1.154 ns; Loc. = LCCOMB_X27_Y12_N14; Fanout = 2; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita5~COUT'
        Info: 8: + IC(0.000 ns) + CELL(0.071 ns) = 1.225 ns; Loc. = LCCOMB_X27_Y12_N16; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita6~COUT'
        Info: 9: + IC(0.000 ns) + CELL(0.410 ns) = 1.635 ns; Loc. = LCCOMB_X27_Y12_N18; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita7'
        Info: 10: + IC(0.000 ns) + CELL(0.084 ns) = 1.719 ns; Loc. = LCFF_X27_Y12_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
        Info: Total cell delay = 1.401 ns ( 81.50 % )
        Info: Total interconnect delay = 0.318 ns ( 18.50 % )
    Info: - Smallest clock skew is -9.039 ns
        Info: + Shortest clock path from clock "CLOCK" to destination register is 5.418 ns
            Info: 1: + IC(0.000 ns) + CELL(0.830 ns) = 0.830 ns; Loc. = PIN_K11; Fanout = 10; CLK Node = 'CLOCK'
            Info: 2: + IC(1.338 ns) + CELL(0.150 ns) = 2.318 ns; Loc. = LCCOMB_X20_Y6_N14; Fanout = 4; COMB Node = 'SELECTOR_BLOCK:inst4|inst8'
            Info: 3: + IC(0.270 ns) + CELL(0.275 ns) = 2.863 ns; Loc. = LCCOMB_X20_Y6_N18; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst46'
            Info: 4: + IC(1.280 ns) + CELL(0.000 ns) = 4.143 ns; Loc. = CLKCTRL_G5; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst46~clkctrl'
            Info: 5: + IC(0.738 ns) + CELL(0.537 ns) = 5.418 ns; Loc. = LCFF_X27_Y12_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
            Info: Total cell delay = 1.792 ns ( 33.07 % )
            Info: Total interconnect delay = 3.626 ns ( 66.93 % )
        Info: - Longest clock path from clock "CLOCK" to source register is 14.457 ns
            Info: 1: + IC(0.000 ns) + CELL(0.830 ns) = 0.830 ns; Loc. = PIN_K11; Fanout = 10; CLK Node = 'CLOCK'
            Info: 2: + IC(1.289 ns) + CELL(0.787 ns) = 2.906 ns; Loc. = LCFF_X18_Y6_N3; Fanout = 12; REG Node = 'CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]'
            Info: 3: + IC(0.766 ns) + CELL(0.413 ns) = 4.085 ns; Loc. = LCCOMB_X20_Y6_N16; Fanout = 11; COMB Node = 'A1_BLOCK:inst|inst8'
            Info: 4: + IC(1.258 ns) + CELL(0.870 ns) = 6.213 ns; Loc. = M4K_X11_Y6; Fanout = 1; MEM Node = 'A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg7'
            Info: 5: + IC(0.000 ns) + CELL(2.993 ns) = 9.206 ns; Loc. = M4K_X11_Y6; Fanout = 2; MEM Node = 'A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|q_a[0]'
            Info: 6: + IC(0.963 ns) + CELL(0.420 ns) = 10.589 ns; Loc. = LCCOMB_X15_Y6_N22; Fanout = 3; COMB Node = 'A1_BLOCK:inst|inst44~1'
            Info: 7: + IC(0.920 ns) + CELL(0.393 ns) = 11.902 ns; Loc. = LCCOMB_X20_Y6_N18; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst46'
            Info: 8: + IC(1.280 ns) + CELL(0.000 ns) = 13.182 ns; Loc. = CLKCTRL_G5; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst46~clkctrl'
            Info: 9: + IC(0.738 ns) + CELL(0.537 ns) = 14.457 ns; Loc. = LCFF_X27_Y12_N5; Fanout = 3; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[0]'
            Info: Total cell delay = 7.243 ns ( 50.10 % )
            Info: Total interconnect delay = 7.214 ns ( 49.90 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Micro setup delay of destination is -0.036 ns
Warning: Circuit may not operate. Detected 61 non-operational path(s) clocked by clock "JMP_IN" with clock skew larger than data delay. See Compilation Report for details.
Info: Found hold time violation between source  pin or register "SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]" and destination pin or register "SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]" for clock "JMP_IN" (Hold time is 2.02 ns)
    Info: + Largest clock skew is 2.541 ns
        Info: + Longest clock path from clock "JMP_IN" to destination register is 7.265 ns
            Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_K16; Fanout = 53; CLK Node = 'JMP_IN'
            Info: 2: + IC(1.354 ns) + CELL(0.437 ns) = 2.623 ns; Loc. = LCCOMB_X15_Y6_N30; Fanout = 2; COMB Node = 'A2_BLOCK:inst1|inst18[0]~5'
            Info: 3: + IC(0.685 ns) + CELL(0.245 ns) = 3.553 ns; Loc. = LCCOMB_X19_Y6_N16; Fanout = 2; COMB Node = 'A2_BLOCK:inst1|inst2~2'
            Info: 4: + IC(0.260 ns) + CELL(0.245 ns) = 4.058 ns; Loc. = LCCOMB_X19_Y6_N30; Fanout = 3; COMB Node = 'A2_BLOCK:inst1|inst44~1'
            Info: 5: + IC(0.404 ns) + CELL(0.275 ns) = 4.737 ns; Loc. = LCCOMB_X20_Y6_N8; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst48'
            Info: 6: + IC(1.270 ns) + CELL(0.000 ns) = 6.007 ns; Loc. = CLKCTRL_G1; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst48~clkctrl'
            Info: 7: + IC(0.721 ns) + CELL(0.537 ns) = 7.265 ns; Loc. = LCFF_X27_Y3_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
            Info: Total cell delay = 2.571 ns ( 35.39 % )
            Info: Total interconnect delay = 4.694 ns ( 64.61 % )
        Info: - Shortest clock path from clock "JMP_IN" to source register is 4.724 ns
            Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_K16; Fanout = 53; CLK Node = 'JMP_IN'
            Info: 2: + IC(1.214 ns) + CELL(0.150 ns) = 2.196 ns; Loc. = LCCOMB_X20_Y6_N8; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst48'
            Info: 3: + IC(1.270 ns) + CELL(0.000 ns) = 3.466 ns; Loc. = CLKCTRL_G1; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst48~clkctrl'
            Info: 4: + IC(0.721 ns) + CELL(0.537 ns) = 4.724 ns; Loc. = LCFF_X27_Y3_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
            Info: Total cell delay = 1.519 ns ( 32.15 % )
            Info: Total interconnect delay = 3.205 ns ( 67.85 % )
    Info: - Micro clock to output delay of source is 0.250 ns
    Info: - Shortest register to register delay is 0.537 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X27_Y3_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
        Info: 2: + IC(0.303 ns) + CELL(0.150 ns) = 0.453 ns; Loc. = LCCOMB_X27_Y3_N18; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita7'
        Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 0.537 ns; Loc. = LCFF_X27_Y3_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst42|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
        Info: Total cell delay = 0.234 ns ( 43.58 % )
        Info: Total interconnect delay = 0.303 ns ( 56.42 % )
    Info: + Micro hold delay of destination is 0.266 ns
Warning: Circuit may not operate. Detected 201 non-operational path(s) clocked by clock "CLOCK" with clock skew larger than data delay. See Compilation Report for details.
Info: Found hold time violation between source  pin or register "SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]" and destination pin or register "SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]" for clock "CLOCK" (Hold time is 8.518 ns)
    Info: + Largest clock skew is 9.039 ns
        Info: + Longest clock path from clock "CLOCK" to destination register is 14.457 ns
            Info: 1: + IC(0.000 ns) + CELL(0.830 ns) = 0.830 ns; Loc. = PIN_K11; Fanout = 10; CLK Node = 'CLOCK'
            Info: 2: + IC(1.289 ns) + CELL(0.787 ns) = 2.906 ns; Loc. = LCFF_X18_Y6_N3; Fanout = 12; REG Node = 'CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[1]'
            Info: 3: + IC(0.766 ns) + CELL(0.413 ns) = 4.085 ns; Loc. = LCCOMB_X20_Y6_N16; Fanout = 11; COMB Node = 'A1_BLOCK:inst|inst8'
            Info: 4: + IC(1.258 ns) + CELL(0.870 ns) = 6.213 ns; Loc. = M4K_X11_Y6; Fanout = 1; MEM Node = 'A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|ram_block1a0~porta_address_reg7'
            Info: 5: + IC(0.000 ns) + CELL(2.993 ns) = 9.206 ns; Loc. = M4K_X11_Y6; Fanout = 2; MEM Node = 'A1_BLOCK:inst|lpm_ram_io:inst1|altram:sram|altsyncram:ram_block|altsyncram_a791:auto_generated|q_a[0]'
            Info: 6: + IC(0.963 ns) + CELL(0.420 ns) = 10.589 ns; Loc. = LCCOMB_X15_Y6_N22; Fanout = 3; COMB Node = 'A1_BLOCK:inst|inst44~1'
            Info: 7: + IC(0.920 ns) + CELL(0.393 ns) = 11.902 ns; Loc. = LCCOMB_X20_Y6_N18; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst46'
            Info: 8: + IC(1.280 ns) + CELL(0.000 ns) = 13.182 ns; Loc. = CLKCTRL_G5; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst46~clkctrl'
            Info: 9: + IC(0.738 ns) + CELL(0.537 ns) = 14.457 ns; Loc. = LCFF_X27_Y12_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
            Info: Total cell delay = 7.243 ns ( 50.10 % )
            Info: Total interconnect delay = 7.214 ns ( 49.90 % )
        Info: - Shortest clock path from clock "CLOCK" to source register is 5.418 ns
            Info: 1: + IC(0.000 ns) + CELL(0.830 ns) = 0.830 ns; Loc. = PIN_K11; Fanout = 10; CLK Node = 'CLOCK'
            Info: 2: + IC(1.338 ns) + CELL(0.150 ns) = 2.318 ns; Loc. = LCCOMB_X20_Y6_N14; Fanout = 4; COMB Node = 'SELECTOR_BLOCK:inst4|inst8'
            Info: 3: + IC(0.270 ns) + CELL(0.275 ns) = 2.863 ns; Loc. = LCCOMB_X20_Y6_N18; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst46'
            Info: 4: + IC(1.280 ns) + CELL(0.000 ns) = 4.143 ns; Loc. = CLKCTRL_G5; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst46~clkctrl'
            Info: 5: + IC(0.738 ns) + CELL(0.537 ns) = 5.418 ns; Loc. = LCFF_X27_Y12_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
            Info: Total cell delay = 1.792 ns ( 33.07 % )
            Info: Total interconnect delay = 3.626 ns ( 66.93 % )
    Info: - Micro clock to output delay of source is 0.250 ns
    Info: - Shortest register to register delay is 0.537 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X27_Y12_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
        Info: 2: + IC(0.303 ns) + CELL(0.150 ns) = 0.453 ns; Loc. = LCCOMB_X27_Y12_N18; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|counter_comb_bita7'
        Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 0.537 ns; Loc. = LCFF_X27_Y12_N19; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|lpm_counter2:inst41|lpm_counter:lpm_counter_component|cntr_skh:auto_generated|safe_q[7]'
        Info: Total cell delay = 0.234 ns ( 43.58 % )
        Info: Total interconnect delay = 0.303 ns ( 56.42 % )
    Info: + Micro hold delay of destination is 0.266 ns
Info: tsu for memory "A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4" (data pin = "JMP_IN", clock pin = "CLOCK") is 4.883 ns
    Info: + Longest pin to memory delay is 9.096 ns
        Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_K16; Fanout = 53; CLK Node = 'JMP_IN'
        Info: 2: + IC(5.167 ns) + CELL(0.150 ns) = 6.149 ns; Loc. = LCCOMB_X18_Y6_N14; Fanout = 17; COMB Node = 'CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|safe_q[15]~0'
        Info: 3: + IC(1.017 ns) + CELL(0.420 ns) = 7.586 ns; Loc. = LCCOMB_X13_Y6_N14; Fanout = 1; COMB Node = 'A2_BLOCK:inst1|inst11'
        Info: 4: + IC(1.368 ns) + CELL(0.142 ns) = 9.096 ns; Loc. = M4K_X23_Y6; Fanout = 4; MEM Node = 'A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4'
        Info: Total cell delay = 1.544 ns ( 16.97 % )
        Info: Total interconnect delay = 7.552 ns ( 83.03 % )
    Info: + Micro setup delay of destination is 0.035 ns
    Info: - Shortest clock path from clock "CLOCK" to destination memory is 4.248 ns
        Info: 1: + IC(0.000 ns) + CELL(0.830 ns) = 0.830 ns; Loc. = PIN_K11; Fanout = 10; CLK Node = 'CLOCK'
        Info: 2: + IC(1.334 ns) + CELL(0.438 ns) = 2.602 ns; Loc. = LCCOMB_X18_Y6_N24; Fanout = 17; COMB Node = 'A2_BLOCK:inst1|inst8'
        Info: 3: + IC(0.985 ns) + CELL(0.661 ns) = 4.248 ns; Loc. = M4K_X23_Y6; Fanout = 4; MEM Node = 'A2_BLOCK:inst1|lpm_ram_io:inst17|altram:sram|altsyncram:ram_block|altsyncram_e791:auto_generated|ram_block1a0~porta_address_reg4'
        Info: Total cell delay = 1.929 ns ( 45.41 % )
        Info: Total interconnect delay = 2.319 ns ( 54.59 % )
Info: tco from clock "CLOCK" to destination pin "JMP_OUT" through register "SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]" is 21.814 ns
    Info: + Longest clock path from clock "CLOCK" to source register is 13.223 ns
        Info: 1: + IC(0.000 ns) + CELL(0.830 ns) = 0.830 ns; Loc. = PIN_K11; Fanout = 10; CLK Node = 'CLOCK'
        Info: 2: + IC(1.289 ns) + CELL(0.787 ns) = 2.906 ns; Loc. = LCFF_X18_Y6_N1; Fanout = 12; REG Node = 'CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]'
        Info: 3: + IC(4.125 ns) + CELL(0.408 ns) = 7.439 ns; Loc. = LCCOMB_X20_Y6_N24; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|inst37'
        Info: 4: + IC(4.551 ns) + CELL(0.000 ns) = 11.990 ns; Loc. = CLKCTRL_G6; Fanout = 8; COMB Node = 'SELECTOR_BLOCK:inst4|inst37~clkctrl'
        Info: 5: + IC(0.696 ns) + CELL(0.537 ns) = 13.223 ns; Loc. = LCFF_X10_Y6_N23; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]'
        Info: Total cell delay = 2.562 ns ( 19.38 % )
        Info: Total interconnect delay = 10.661 ns ( 80.62 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Longest register to pin delay is 8.341 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X10_Y6_N23; Fanout = 2; REG Node = 'SELECTOR_BLOCK:inst4|COUNTER_BLOCK:inst40|A2[0]'
        Info: 2: + IC(0.994 ns) + CELL(0.416 ns) = 1.410 ns; Loc. = LCCOMB_X8_Y5_N0; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_compare0:inst39|lpm_compare:lpm_compare_component|cmpr_bhg:auto_generated|op_1~0'
        Info: 3: + IC(0.241 ns) + CELL(0.420 ns) = 2.071 ns; Loc. = LCCOMB_X8_Y5_N2; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_compare0:inst39|lpm_compare:lpm_compare_component|cmpr_bhg:auto_generated|op_1~1'
        Info: 4: + IC(0.243 ns) + CELL(0.420 ns) = 2.734 ns; Loc. = LCCOMB_X8_Y5_N4; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|lpm_compare0:inst39|lpm_compare:lpm_compare_component|cmpr_bhg:auto_generated|op_1~2'
        Info: 5: + IC(1.518 ns) + CELL(0.413 ns) = 4.665 ns; Loc. = LCCOMB_X20_Y6_N20; Fanout = 1; COMB Node = 'SELECTOR_BLOCK:inst4|busmux:inst38|lpm_mux:$00000|mux_lmc:auto_generated|result_node[0]~0'
        Info: 6: + IC(0.898 ns) + CELL(2.778 ns) = 8.341 ns; Loc. = PIN_K10; Fanout = 0; PIN Node = 'JMP_OUT'
        Info: Total cell delay = 4.447 ns ( 53.31 % )
        Info: Total interconnect delay = 3.894 ns ( 46.69 % )
Info: Longest tpd from source pin "JMP_IN" to destination pin "IP[4]" is 13.232 ns
    Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_K16; Fanout = 53; CLK Node = 'JMP_IN'
    Info: 2: + IC(0.000 ns) + CELL(5.598 ns) = 6.430 ns; Loc. = LCCOMB_X13_Y6_N12; Fanout = 4; COMB LOOP Node = 'CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[4]~27'
        Info: Loc. = LCCOMB_X13_Y6_N12; Node "CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|latch_signal[4]~27"
    Info: 3: + IC(0.260 ns) + CELL(0.150 ns) = 6.840 ns; Loc. = LCCOMB_X13_Y6_N8; Fanout = 2; COMB Node = 'CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|safe_q[4]~15'
    Info: 4: + IC(2.005 ns) + CELL(0.393 ns) = 9.238 ns; Loc. = LCCOMB_X20_Y6_N12; Fanout = 1; COMB Node = 'CONTROL_BLOCK:inst2|lpm_counter3:inst4|lpm_counter:lpm_counter_component|cntr_6li:auto_generated|safe_q[4]~16'
    Info: 5: + IC(1.216 ns) + CELL(2.778 ns) = 13.232 ns; Loc. = PIN_A13; Fanout = 0; PIN Node = 'IP[4]'
    Info: Total cell delay = 9.751 ns ( 73.69 % )
    Info: Total interconnect delay = 3.481 ns ( 26.31 % )
Info: th for register "SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]" (data pin = "JMP_IN", clock pin = "CLOCK") is 9.302 ns
    Info: + Longest clock path from clock "CLOCK" to destination register is 11.439 ns
        Info: 1: + IC(0.000 ns) + CELL(0.830 ns) = 0.830 ns; Loc. = PIN_K11; Fanout = 10; CLK Node = 'CLOCK'
        Info: 2: + IC(1.289 ns) + CELL(0.787 ns) = 2.906 ns; Loc. = LCFF_X18_Y6_N1; Fanout = 12; REG Node = 'CONTROL_BLOCK:inst2|lpm_counter0:inst|lpm_counter:lpm_counter_component|cntr_p2i:auto_generated|safe_q[0]'
        Info: 3: + IC(0.794 ns) + CELL(0.398 ns) = 4.098 ns; Loc. = LCCOMB_X20_Y6_N14; Fanout = 4; COMB Node = 'SELECTOR_BLOCK:inst4|inst8'
        Info: 4: + IC(6.117 ns) + CELL(0.000 ns) = 10.215 ns; Loc. = CLKCTRL_G7; Fanout = 40; COMB Node = 'SELECTOR_BLOCK:inst4|inst8~clkctrl'
        Info: 5: + IC(0.687 ns) + CELL(0.537 ns) = 11.439 ns; Loc. = LCFF_X15_Y6_N23; Fanout = 4; REG Node = 'SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]'
        Info: Total cell delay = 2.552 ns ( 22.31 % )
        Info: Total interconnect delay = 8.887 ns ( 77.69 % )
    Info: + Micro hold delay of destination is 0.266 ns
    Info: - Shortest pin to register delay is 2.403 ns
        Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_K16; Fanout = 53; CLK Node = 'JMP_IN'
        Info: 2: + IC(1.337 ns) + CELL(0.150 ns) = 2.319 ns; Loc. = LCCOMB_X15_Y6_N22; Fanout = 3; COMB Node = 'A1_BLOCK:inst|inst44~1'
        Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 2.403 ns; Loc. = LCFF_X15_Y6_N23; Fanout = 4; REG Node = 'SELECTOR_BLOCK:inst4|lpm_shiftreg0:inst3|lpm_shiftreg:lpm_shiftreg_component|dffs[0]'
        Info: Total cell delay = 1.066 ns ( 44.36 % )
        Info: Total interconnect delay = 1.337 ns ( 55.64 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 36 warnings
    Info: Peak virtual memory: 171 megabytes
    Info: Processing ended: Wed Nov 06 15:13:31 2013
    Info: Elapsed time: 00:00:01
    Info: Total CPU time (on all processors): 00:00:01


