-- WARNING: Do NOT edit the input and output ports in this file in a text
-- editor if you plan to continue editing the block that represents it in
-- the Block Editor! File corruption is VERY likely to occur.

-- Copyright (C) 1991-2009 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
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-- Generated by Quartus II Version 9.1 (Build Build 222 10/21/2009)
-- Created on Fri Oct 25 05:35:31 2013

FUNCTION CACHE_CONTROL (CLOCK_PUBLIC, COUNTER_DEC[7..0], DATA_BUS_IN[7..0], CLOCK_DEC, ROM_DEC, W, ADDR_DEC[7..0], TAG[2..0], OUT_CACHE[7..0], MISS, M, TAG_FIX[2..0], F, COUNTER[7..0])
	RETURNS (DATA_MEM[7..0], ADDR_MEM[7..0], CLOCK_MEM, WRITE_MEM, DELAY, CLOCK_CACHE, WRITE_CACHE, ADDR_CACHE[7..0], IN_CACHE[7..0], CLOCK_FLAG, ACLR, CLOCK_COUNTER, CLOCK_FIX);
