Fitter Status : Successful - Fri Apr 11 04:58:48 2014
Quartus II Version : 9.1 Build 222 10/21/2009 SJ Web Edition
Revision Name : Arbitration
Top-level Entity Name : MAIN_BLOCK
Family : Stratix II
Device : EP2S15F484C3
Timing Models : Final
Logic utilization : < 1 %
    Combinational ALUTs : 58 / 12,480 ( < 1 % )
    Dedicated logic registers : 32 / 12,480 ( < 1 % )
Total registers : 32
Total pins : 17 / 343 ( 5 % )
Total virtual pins : 0
Total block memory bits : 0 / 419,328 ( 0 % )
DSP block 9-bit elements : 0 / 96 ( 0 % )
Total PLLs : 0 / 6 ( 0 % )
Total DLLs : 0 / 2 ( 0 % )
