# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2009 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 9.1 Build 222 10/21/2009 SJ Web Edition
# Date created = 14:17:25  July 31, 2013
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		CPU_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE AUTO
set_global_assignment -name TOP_LEVEL_ENTITY MAIN_MODULE
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:17:25  JULY 31, 2013"
set_global_assignment -name LAST_QUARTUS_VERSION 9.1
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name LL_ROOT_REGION ON -entity CPU -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -entity CPU -section_id "Root Region"
set_global_assignment -name BDF_FILE MAIN_MODULE.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE test_MAIN_MODULE.vwf
set_global_assignment -name BDF_FILE DMA_BLOCK.bdf
set_global_assignment -name BDF_FILE test.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE test.vwf
set_global_assignment -name BDF_FILE COUNTER.bdf
set_global_assignment -name BDF_FILE FLAG_BLOCK.bdf
set_global_assignment -name VHDL_FILE INV_BLOCK.vhd
set_global_assignment -name VHDL_FILE CACHE_CONTROL.vhd
set_global_assignment -name BDF_FILE CACHE_BLOCK.bdf
set_global_assignment -name BDF_FILE CACHE_MAIN.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE test_CACHE_MAIN.vwf
set_global_assignment -name BDF_FILE ALU_BLOCK.bdf
set_global_assignment -name BDF_FILE ALU_CONTROL.bdf
set_global_assignment -name BDF_FILE ROL_BLOCK.bdf
set_global_assignment -name BDF_FILE INCS_DIRECT_BLOCK.bdf
set_global_assignment -name BDF_FILE INCS_REGISTERS_BLOCK.bdf
set_global_assignment -name BDF_FILE NAND_DIRECT_BLOCK.bdf
set_global_assignment -name BDF_FILE NAND_IMMEDIATE_BLOCK.bdf
set_global_assignment -name BDF_FILE "M-R_DIRECT_BLOCK.bdf"
set_global_assignment -name BDF_FILE "M-R_INDIRECT_BLOCK.bdf"
set_global_assignment -name BDF_FILE "R-M_DIRECT.bdf"
set_global_assignment -name BDF_FILE JMP_BLOCK.bdf
set_global_assignment -name BDF_FILE NOP_BLOCK.bdf
set_global_assignment -name BDF_FILE TEMPLATE_CMD_BLOCK.bdf
set_global_assignment -name BDF_FILE ZERO_ITERATION_BLOCK.bdf
set_global_assignment -name VHDL_FILE ACLR_BLOCK.vhd
set_global_assignment -name BDF_FILE CHECK_IN_ALU.bdf
set_global_assignment -name BDF_FILE CHECK_OUT_ALU.bdf
set_global_assignment -name BDF_FILE CHECK_IN_BLOCK.bdf
set_global_assignment -name BDF_FILE CHECK_OUT_BLOCK.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE test_CONTROL_BLOCK.vwf
set_global_assignment -name BDF_FILE GLOBAL_REGISTERS.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE test_GLOBAL_REGISTERS.vwf
set_global_assignment -name BDF_FILE SPEC_REGISTERS.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE test_SPEC_REGISTERS.vwf
set_global_assignment -name BDF_FILE RAM_ROM_BIDIR.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE test_RAM_ROM_BIDIR.vwf
set_global_assignment -name BDF_FILE RAM.bdf
set_global_assignment -name HEX_FILE RAM.hex
set_global_assignment -name BDF_FILE ROM.bdf
set_global_assignment -name HEX_FILE ROM.hex
set_global_assignment -name BDF_FILE DECODE_BLOCK.bdf
set_global_assignment -name BDF_FILE PUBLIC_OPERATIONS_BLOCK.bdf
set_global_assignment -name BDF_FILE STACK_BLOCK.bdf
set_global_assignment -name BDF_FILE STACK_MAIN.bdf
set_global_assignment -name BDF_FILE DIV2.bdf
set_global_assignment -name SOURCE_FILE lpm_add_sub0.cmp
set_global_assignment -name AHDL_FILE lpm_add_sub0.tdf
set_global_assignment -name SOURCE_FILE lpm_add_sub1.cmp
set_global_assignment -name AHDL_FILE lpm_add_sub1.tdf
set_global_assignment -name SOURCE_FILE lpm_decode3.cmp
set_global_assignment -name SOURCE_FILE lpm_add_sub2.cmp
set_global_assignment -name SOURCE_FILE lpm_compare5.cmp
set_global_assignment -name AHDL_FILE lpm_compare5.tdf
set_global_assignment -name SOURCE_FILE lpm_constant10.cmp
set_global_assignment -name VHDL_FILE lpm_constant10.vhd
set_global_assignment -name SOURCE_FILE lpm_constant9.cmp
set_global_assignment -name VHDL_FILE lpm_constant9.vhd
set_global_assignment -name SOURCE_FILE lpm_counter0.cmp
set_global_assignment -name AHDL_FILE lpm_counter0.tdf
set_global_assignment -name AHDL_FILE lpm_add_sub2.tdf
set_global_assignment -name SOURCE_FILE lpm_counter2.cmp
set_global_assignment -name AHDL_FILE lpm_counter2.tdf
set_global_assignment -name SOURCE_FILE lpm_counter4.cmp
set_global_assignment -name AHDL_FILE lpm_counter4.tdf
set_global_assignment -name AHDL_FILE lpm_decode2.tdf
set_global_assignment -name SOURCE_FILE lpm_dff0.cmp
set_global_assignment -name AHDL_FILE lpm_decode3.tdf
set_global_assignment -name SOURCE_FILE lpm_decode5.cmp
set_global_assignment -name AHDL_FILE lpm_decode5.tdf
set_global_assignment -name SOURCE_FILE lpm_decode8.cmp
set_global_assignment -name VHDL_FILE lpm_decode8.vhd
set_global_assignment -name SOURCE_FILE lpm_decode2.cmp
set_global_assignment -name AHDL_FILE lpm_dff0.tdf
set_global_assignment -name QIP_FILE lpm_dff5.qip
set_global_assignment -name SOURCE_FILE lpm_dff2.cmp
set_global_assignment -name AHDL_FILE lpm_dff2.tdf
set_global_assignment -name SOURCE_FILE lpm_mux4.cmp
set_global_assignment -name AHDL_FILE lpm_mux4.tdf
set_global_assignment -name SOURCE_FILE RAM_ROM_BIDIR.cmp
set_global_assignment -name SOURCE_FILE SPEC_REGISTERS.cmp
set_global_assignment -name SOURCE_FILE GLOBAL_REGISTERS.cmp
set_global_assignment -name QIP_FILE lpm_counter1.qip
set_global_assignment -name QIP_FILE lpm_decode0.qip
set_global_assignment -name QIP_FILE lpm_dff1.qip
set_global_assignment -name QIP_FILE lpm_dff3.qip
set_global_assignment -name QIP_FILE lpm_decode1.qip
set_global_assignment -name QIP_FILE lpm_compare0.qip
set_global_assignment -name QIP_FILE lpm_dff4.qip
set_global_assignment -name VHDL_FILE SAVE.vhd
set_global_assignment -name VHDL_FILE MUX_BLOCK.vhd
set_global_assignment -name VHDL_FILE DEC_CLOCK.vhd
set_global_assignment -name QIP_FILE lpm_dff6.qip
set_global_assignment -name QIP_FILE lpm_counter3.qip
set_global_assignment -name QIP_FILE lpm_counter5.qip
set_global_assignment -name QIP_FILE lpm_counter6.qip
set_global_assignment -name VHDL_FILE UP_BLOCK.vhd
set_global_assignment -name QIP_FILE lpm_counter7.qip
set_global_assignment -name QIP_FILE lpm_decode4.qip
set_global_assignment -name QIP_FILE ../../LAB9/LAB9/lpm_add_sub3.qip
set_global_assignment -name QIP_FILE ../../LAB9/LAB9/lpm_xor0.qip
set_global_assignment -name QIP_FILE ../../LAB9/LAB9/lpm_and0.qip
set_global_assignment -name QIP_FILE ../../LAB9/LAB9/lpm_or0.qip
set_global_assignment -name QIP_FILE lpm_decode6.qip
set_global_assignment -name QIP_FILE lpm_dff7.qip
set_global_assignment -name QIP_FILE lpm_dff8.qip
set_global_assignment -name QIP_FILE alt3pram0.qip
set_global_assignment -name QIP_FILE lpm_add_sub3.qip
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE test_MAIN_MODULE.vwf
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top