Analysis & Synthesis Status : Successful - Fri Apr 11 04:58:42 2014
Quartus II Version : 9.1 Build 222 10/21/2009 SJ Web Edition
Revision Name : Arbitration
Top-level Entity Name : MAIN_BLOCK
Family : Stratix II
Logic utilization : N/A
    Combinational ALUTs : 58
    Dedicated logic registers : 32
Total registers : 32
Total pins : 17
Total virtual pins : 0
Total block memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0
