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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 65.977 ns
From           : DMA_DATA_BIDIR[2]
To             : DECODE_BLOCK:inst8|SPEC_REGISTERS:inst18|lpm_counter0:inst7|lpm_counter:lpm_counter_component|cntr_p2j:auto_generated|safe_q[1]
From Clock     : --
To Clock       : CLOCK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 865.355 ns
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[2]
To             : DATA_BUS3[1]
From Clock     : CLOCK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 71.488 ns
From           : DMA_DATA_BIDIR[2]
To             : DATA_BUS3[1]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 796.371 ns
From           : CLOCK
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : --
To Clock       : CLOCK
Failed Paths   : 0

Type           : Clock Setup: 'CLOCK'
Slack          : N/A
Required Time  : None
Actual Time    : 0.59 MHz ( period = 1684.608 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : CACHE_BLOCK:inst5|CACHE_CONTROL:inst1|IN_CACHE[4]
From Clock     : CLOCK
To Clock       : CLOCK
Failed Paths   : 0

Type           : Clock Setup: 'DMA_CLOCK'
Slack          : N/A
Required Time  : None
Actual Time    : 1.25 MHz ( period = 800.961 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : RAM_ROM_BIDIR:inst1|lpm_ram_io:inst|altram:sram|altsyncram:ram_block|altsyncram_e891:auto_generated|ram_block1a4~porta_datain_reg0
From Clock     : DMA_CLOCK
To Clock       : DMA_CLOCK
Failed Paths   : 0

Type           : Clock Setup: 'DMA_DATA_BIDIR[2]'
Slack          : N/A
Required Time  : None
Actual Time    : 1.27 MHz ( period = 788.917 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst9|lpm_ff:lpm_ff_component|dffs[4]
From Clock     : DMA_DATA_BIDIR[2]
To Clock       : DMA_DATA_BIDIR[2]
Failed Paths   : 0

Type           : Clock Setup: 'DMA_DATA_BIDIR[3]'
Slack          : N/A
Required Time  : None
Actual Time    : 1.30 MHz ( period = 767.194 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst4|lpm_ff:lpm_ff_component|dffs[5]
From Clock     : DMA_DATA_BIDIR[3]
To Clock       : DMA_DATA_BIDIR[3]
Failed Paths   : 0

Type           : Clock Setup: 'DMA_DATA_BIDIR[1]'
Slack          : N/A
Required Time  : None
Actual Time    : 1.32 MHz ( period = 759.240 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[4]
From Clock     : DMA_DATA_BIDIR[1]
To Clock       : DMA_DATA_BIDIR[1]
Failed Paths   : 0

Type           : Clock Setup: 'DMA_WRITE'
Slack          : N/A
Required Time  : None
Actual Time    : 1.33 MHz ( period = 754.033 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst9|lpm_ff:lpm_ff_component|dffs[4]
From Clock     : DMA_WRITE
To Clock       : DMA_WRITE
Failed Paths   : 0

Type           : Clock Setup: 'DMA_DATA_BIDIR[6]'
Slack          : N/A
Required Time  : None
Actual Time    : 1.33 MHz ( period = 752.284 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst9|lpm_ff:lpm_ff_component|dffs[4]
From Clock     : DMA_DATA_BIDIR[6]
To Clock       : DMA_DATA_BIDIR[6]
Failed Paths   : 0

Type           : Clock Setup: 'DMA_DATA_BIDIR[7]'
Slack          : N/A
Required Time  : None
Actual Time    : 1.33 MHz ( period = 752.284 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst9|lpm_ff:lpm_ff_component|dffs[4]
From Clock     : DMA_DATA_BIDIR[7]
To Clock       : DMA_DATA_BIDIR[7]
Failed Paths   : 0

Type           : Clock Setup: 'DMA_DATA_BIDIR[4]'
Slack          : N/A
Required Time  : None
Actual Time    : 1.33 MHz ( period = 750.502 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[4]
From Clock     : DMA_DATA_BIDIR[4]
To Clock       : DMA_DATA_BIDIR[4]
Failed Paths   : 0

Type           : Clock Setup: 'DMA_DATA_BIDIR[5]'
Slack          : N/A
Required Time  : None
Actual Time    : 1.34 MHz ( period = 748.866 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst3|lpm_ff:lpm_ff_component|dffs[4]
From Clock     : DMA_DATA_BIDIR[5]
To Clock       : DMA_DATA_BIDIR[5]
Failed Paths   : 0

Type           : Clock Setup: 'DMA_DATA_BIDIR[0]'
Slack          : N/A
Required Time  : None
Actual Time    : 1.35 MHz ( period = 742.763 ns )
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst64|lpm_ff:lpm_ff_component|dffs[4]
From Clock     : DMA_DATA_BIDIR[0]
To Clock       : DMA_DATA_BIDIR[0]
Failed Paths   : 0

Type           : Clock Hold: 'CLOCK'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : ALU_BLOCK:inst3|ALU_CONTROL:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : CLOCK
To Clock       : CLOCK
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_CLOCK'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : RAM_ROM_BIDIR:inst1|lpm_ram_io:inst|altram:sram|altsyncram:ram_block|altsyncram_e891:auto_generated|ram_block1a6~porta_address_reg0
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_CLOCK
To Clock       : DMA_CLOCK
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_DATA_BIDIR[2]'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst9|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_DATA_BIDIR[2]
To Clock       : DMA_DATA_BIDIR[2]
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_DATA_BIDIR[3]'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst4|lpm_ff:lpm_ff_component|dffs[3]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_DATA_BIDIR[3]
To Clock       : DMA_DATA_BIDIR[3]
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_DATA_BIDIR[1]'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst26|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_DATA_BIDIR[1]
To Clock       : DMA_DATA_BIDIR[1]
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_WRITE'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst4|lpm_ff:lpm_ff_component|dffs[3]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_WRITE
To Clock       : DMA_WRITE
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_DATA_BIDIR[7]'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst4|lpm_ff:lpm_ff_component|dffs[3]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_DATA_BIDIR[7]
To Clock       : DMA_DATA_BIDIR[7]
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_DATA_BIDIR[6]'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst4|lpm_ff:lpm_ff_component|dffs[3]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_DATA_BIDIR[6]
To Clock       : DMA_DATA_BIDIR[6]
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_DATA_BIDIR[4]'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst26|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_DATA_BIDIR[4]
To Clock       : DMA_DATA_BIDIR[4]
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_DATA_BIDIR[5]'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst3|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_DATA_BIDIR[5]
To Clock       : DMA_DATA_BIDIR[5]
Failed Paths   : 10000

Type           : Clock Hold: 'DMA_DATA_BIDIR[0]'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : GLOBAL_REGISTERS:inst|lpm_dff0:inst61|lpm_ff:lpm_ff_component|dffs[6]
To             : GLOBAL_REGISTERS:inst|lpm_dff0:inst2|lpm_ff:lpm_ff_component|dffs[6]
From Clock     : DMA_DATA_BIDIR[0]
To Clock       : DMA_DATA_BIDIR[0]
Failed Paths   : 10000

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 110000

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