library IEEE;
use IEEE.std_logic_1164.all;


entity DOWN_BLOCK is   -- DOWN_BLOCK 
        port (  
                ON_IN, CLOCK		: in std_logic; 
				DOWN 					: out std_logic
        );
end DOWN_BLOCK ;


architecture DOWN_MAIN of DOWN_BLOCK is
begin
        process (ON_IN, CLOCK)        
        begin
			if(ON_IN='1') then
                if(CLOCK'event and CLOCK='0') then
					DOWN <= '1';
				end if;
			else
				DOWN <= '0';
			end if;
        end process;
end DOWN_MAIN;


